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| MDD Overclocking Guide **
DISCLAIMER ** I have yet to find a website that outlines how to overclock your MDD G4 in a step by step format. Through a lot research and testing I am confident that the information and pictures provided will allow even a novice with moderate soldering skills to perform the overclock. Be aware that if you do not have the confidence to do this, then you probably shouldn't.
(This guide assumes you are overclocking a 167MHz bus model MDD (1GHz, 1.25GHz or 1.42GHz). 867MHz models use a 133MHz bus.) Tools you will need: - Antistatic Wrist Strap - Variable temperature soldering station with pencil tip - Regular soldering irons will be ok too but a soldering station is preferred - Philips screwdriver - Tweezers - Magnifying glass (optional) - Thermal paste
Step 1. Remove the heatsink and then the processor board from your MDD and clean away any heat transfer paste from the CPU cores. You should have something in front of you that looks like this
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Step 2. Locate the following resistor locations as this is where the modifications will occur. There are 5 multiplier locations on the front of the processor board for one CPU and also 5 multiplier locations on the reverse side of the board for the second CPU. Whatever multipliers you choose, it must be the same for both CPU's or the system will not boot.
Front location
Rear location - Picture also shows CPU voltage regulator resistors marked "VID[0-4]"
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Step 3. The table below outlines the PLL_EXT and PLL_CFG[0-3] settings for different bus and CPU speeds. For this example I am starting with a stock 1250MHz speed (7.5x multiplier) setting and upgrading to 1500MHz (9x multiplier) setting. The first number in the fields of the first column represents the PLL_EXT resistor and the following 4 numbers represent PLL_CFG[0], PLL_CFG[1], PLL_CFG[2] and PLL_CFG[3] resistors. Example: 167MHz system bus and 1250MHz (7.5x multiplier) CPU speed is represented as: PLL_EXT = 0 (resistor or bridged) PLL_CFG[0] = 0 (resistor or bridged) PLL_CFG[1] = 0 (resistor or bridged) PLL_CFG[2] = 0 (resistor or bridged) PLL_CFG[3] = 1 (no resistor or open) Our target speed is 1500MHz (9x multiplier) - This is represented as: PLL_EXT = 1 (no resistor or open) PLL_CFG[0] = 0 (resistor or bridged) PLL_CFG[1] = 1 (no resistor or open) PLL_CFG[2] = 1 (no resistor or open) PLL_CFG[3] = 1 (no resistor or open) |
| PLL Multiplier Config + Actual Speed on given bus | ||||||
| PLL_EXT+PLL[0-3]
0=Closed 1=Open |
Multiplier
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50MHz Bus Clock | 66MHz Bus Clock | 100MHz Bus Clock | 133.33MHz Bus Clock | 166.66MHz Bus Clock |
| 00100 | 2x |
100MHz | 133MHZ | 200MHz | 267MHz | 333MHz |
| 00110 | 2.5x
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125MHz | 166MHz | 250MHz | 333MHz | 417MHz |
| 01000 | 3x |
150MHz | 200MHz | 300MHz | 400MHz | 500MHz |
| 01110 | 3.5x
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175MHz | 233MHz | 350MHz | 467MHz | 583MHz |
| 01010 | 4x |
200MHz | 266MHz | 400MHz | 533MHz | 667MHz |
| 00111 | 4.5x
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225MHz | 300MHz | 450MHz | 600MHz | 750MHz |
| 01011 | 5x |
250MHz | 333MHz | 500MHz | 667MHz | 833MHz |
| 01001 | 5.5x
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275MHz | 366MHz | 550MHz | 733MHz | 917MHz |
| 01101 | 6x |
300MHz | 400MHz | 600MHz | 800MHz | 1000MHz |
| 00101 | 6.5x
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325MHz | 433MHz | 650MHz | 867MHz | 1083MHz |
| 00010 | 7x |
350MHz | 466MHz | 700MHz | 933MHz | 1167MHz |
| 00001 | 7.5x
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375MHz | 500MHz | 750MHz | 1000MHz | 1250MHz |
| 01100 | 8x
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400MHz | 533MHz | 800MHz | 1067MHz | 1333MHz |
| 00110 | 8.5x
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425MHz | 566MHz | 850MHz | 1133MHz | 1417MHz |
| 10111 | 9x
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450MHz | 600MHz | 900MHz | 1200MHz | 1500MHz |
| 00111 | 9.5x
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475MHz | 633MHz | 950MHz | 1267MHz | 1583MHz |
| 11010 | 10x |
500MHz | 667MHz | 1000MHz | 1333MHz | 1667MHz |
| 11000 | 10.5x
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525MHz | 700MHz | 1050MHz | 1400MHz | 1750MHz |
| 11001 | 11x |
550MHz | 733MHz | 1100MHz | 1467MHz | 1833MHz |
| 00000 | 11.5x
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575MHz | 766MHz | 1150MHz | 1533MHz | 1917MHz |
| 11011 | 12x |
600MHz | 800MHz | 1200MHz | 1600MHz | 2000MHz |
| 11111 | 12.5x
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625MHz | 833MHz | 1250MHz | 1667MHz | 2083MHz |
| 10101 | 13x |
650MHz | 867MHz | 1300MHz | 1733MHz | 2167MHz |
| 01110 | 13.5x
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675MHz | 900MHz | 1350MHz | 1800MHz | 2250MHz |
| 11100 | 14x |
700MHz | 933MHz | 1400MHz | 1867MHz | 2333MHz |
| 10001 | 15x |
750MHz | 1000MHz | 1500MHz | 2000MHz | 2500MHz |
| 11101 | 16x |
800MHz | 1067MHz | 1600MHz | 2133MHz | 2667MHz |
| 00011 | PLL off/bypass
(1x bus to core implied) |
50MHz | 66MHz | 100MHz | 133MHz | 167MHz |
| 01111 | PLL off
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0MHz | 0MHz | 0MHz | 0MHz | 0MHz |
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Close up of the multiplier resistor locations @ 1500MHz (front)
Close up of the multiplier resistor locations @ 1500MHz (rear)
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Step 4. You will notice that all the resistors that were originally in these locations have been removed. This was done by using a soldering iron and a pair of tweezers to gently pry the resistors off the contacts of the board. You do not have to do this if you know your target CPU speed. I removed them because I tested a lot of different speeds and it just made it easier to remove them all. To remove a resistor, just heat each side of it for 1 second at a time until it loosens - A lot of patience is needed here as forcing the resistor off without proper heating can result in damage to the contact. You can choose to re-solder these resistors as you wish but I find it just a bit too fiddley (they are painfully small). I instead use a small ball of solder to bridge the contacts as you can see in the above photo (PLL_CFG[0]). |
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Step 5. The voltage regulator multipliers work on the exact same principal as CPU multipliers. The table of voltages is listed below including the default settings of a 2003 Dual 1.25GHz MDD. (This last step is not necessary for most minor overclocks, 1500MHz @ 1.55V (default) probably being the limit of a stock 1250MHz processor (7455B). Anything higher will require a voltage boost to be stable.) |
| Core Supply Voltage Settings (for 1250MHz CPU's only) | ||
| VID[0-4] | Vdd [V] | Comments |
| 11110 | 1.30 | |
| 01110 | 1.35 | |
| 10110 | 1.40 | |
| 00110 | 1.45 | |
| 11010 | 1.50 | |
| 01010 | 1.55 | default (for DP1.25 - 2003) |
| 10010 | 1.60 | |
| 00010 | 1.65 | |
| 11100 | 1.70 | |
| 01100 | 1.75 | |
| 10100 | 1.80 | |
| 00100 | 1.85 | |
| 11000 | 1.90 | |
| 01000 | 1.95 | |
| 10000 | 2.00 | |
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A close up picture of the voltage resistor settings for the 1250MHz CPU module (1.60V shown below)
This is the pin allocation for the above voltage regulator (1250MHz module)
This section refers to 1420MHz modules only Below is the multiplier table for the 3-Phase LTC3732CG - Note the default voltage for the 1420MHz module is 1.60V
A closeup of the voltage regulator for the 1420MHz processor module
and the corresponding pin allocation
Step 6. Double check your solder joins and multiplier settings and reinstall the processor board. Be sure to apply thermal paste (such as Arctic Silver 5) to both CPU cores before re-seating the heatsink. Power up the G4. If you hear the signature Mac startup chime, you have succeeded. If not remove everything and check your solder joins or try bringing down the processor speed a notch - If you overclock too high your machine will not boot.
Extra Pictures A close up picture of the very clockable Motorola 1250MHz 7455B processor
The 1400MHz 7455B
One of the 1Mb Samsung Cache modules
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